Such a fault-tolerant processing system is already known in the art, e.g. from the general information pamphlet of "STRATUS--CONTINUOUS PROCESSING" published by "Stratus Computer, Inc.", 55 Fairbanks Boulevard, Marlboro, Mass. 01752, USA. Therein is disclosed a fault-tolerant computer with a printed circuit board carrying duplicated components, say a set of processors. Each board is further duplicated to provide together with the other board a pair of partner sets of processors, the four processors operating simultaneously with the same data. Furthermore, on each processor board the results of the operations of the two processors thereof are permanently compared. If a processor fails, i.e. when the results do not match, the system continues its processing with the set of processors of the other (partner) processor board without missing a step and with no degradation of performance, the processor board carrying the failing component being immediately removed from service, i.e. the faulty processor board is disconnected from the system.
The present invention more particularly relates to a method which consists in replacing at least said second set of processors by a third set of processors operating at a second processing frequency relatively higher than said bus clock frequency.
When, e.g. as a result of a failing processor, a processor board has to be replaced in the fault-tolerant processing system, it may occur that a new identical processor board is not immediately available. In that case it may be useful to allow the system to operate, at least temporarily, with a compatible processor board, e.g. carrying a set of processors of another type and which operate at another or second processing frequency.
A problem to modify in this way the hardware configuration of the system is that the two sets of processors have to operate in the same way as the above pair of partner sets of processors, i.e. in microsynchronization, to obtain a fault-tolerant processing system. This microsynchronization gives rise to a complex microsynchronization of the processing clock especially when it has to be done in a "non-stop" (on-line) environment, i.e. without interrupting the operation of the system.